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% Original Version 1.0 in text form by Francois Pecheux
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\begin{document}

\begin{center}
\Huge Using \bf Alliance\\
\Huge Tutorials
\end{center}
\vspace{2cm}

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\begin{center}
Abstract

\begin{quote}
\em
These tutorials introduce the design flow to be used in the
\textbf{Alliance} CAD framework for the design and verification of a 
standard cells circuit, including the pads.
Each step of the desgin flow is supported by one or more specific 
tools, whose use is briefly explained in the tutorials.

These texts are meant to be simple and comprehensive, and are to be used
to get \emph{into} the system.
Should something be unclear or wrong, please indicate this by sending
an e-mail to \texttt{alliance-users@asim.lip6.fr}.
\rm
\end{quote}
\end{center}


\section{Introduction}
In these tutorials, you will learn the practical use of some basic
\textbf{Alliance} tools by building some very simple circuits from scratch.
It is recommended that you read the \texttt{overview.pdf} file before
proceeding, as it describes the main steps of the design conceptually.

\section{Before starting}
In those tutorials you will learn the practical use of the following 
\textbf{Alliance} tools :

In the first tutorial (simulation/ directory) :
\begin{itemize}
\item \textbf{asimut} : VHDL compiler and simulator.
\item \textbf{genpat} : patterns generator.
\item \textbf{genlib} : Netlist capture.
\item \textbf{xpat}   : Graphical pattern viewer.
\end{itemize}

In the second tutorial (place\_route/ directory) :
\begin{itemize}
\item \textbf{ocp}    : Standard cell placer.
\item \textbf{ocr}    : Over cell router (obsolete)
\item \textbf{nero}   : Over cell router
\item \textbf{druc}   : Design rule checker.
\item \textbf{ring}   : Core to pads router.
\item \textbf{cougar} : Symbolic layout extractor.
\item \textbf{lvx}    : Netlist comparator.
\item \textbf{graal}  : Graphic layout editor.
\end{itemize}

In the third tutorial (synthesis/ directory) :
\begin{itemize}
\item \textbf{syf}  : Finite state machine synthesizer.
\item \textbf{boom} : Boolean optimization of a logic level behavioral 
description (VHDL data flow).
\item \textbf{boog} : Mapping of a behavioral descriptiononto a standard cell 
library.
\item \textbf{loon} : Fanout optimizer, global optimizer and timing analyser of 
\item \textbf{scapin} : Scan Path insertion
\item \textbf{xsch} : Graphical schematic viewer.
\end{itemize}

If you run a \texttt{c-like} shell, like \texttt{csh} or \texttt{tcsh}, 
try to run the following command :

\begin{phraseverbatim}
~alp/addaccu %-) source /etc/profile.d/alc_env.csh
\end{phraseverbatim}

Otherwise, if you run a \texttt{sh-like} shell, try to run the following 
command :
\begin{phraseverbatim}
~alp/addaccu %-) source /etc/profile.d/alc_env.sh
\end{phraseverbatim}
\\
Before we proceed to the tutorial, you must make sure that the
\textbf{Alliance} tools are readilly available when invoking them at the 
prompt.
The prompt in represented in the following text by the symbol~:
\begin{phraseverbatim}
~alp/addaccu %-)
\end{phraseverbatim}
In this system, \texttt{alp} is the user, \texttt{addaccu} is the current
directory, and \texttt{\%-)} is supposed to give us courage!

\section{Execution environment set up}
Later, before you will start examining alliance tools, you will probably want 
to know the environment variables setup.
To see it, please enter the following command :

\begin{phraseverbatim}
~alp/addaccu %-) env | grep MBK
\end{phraseverbatim}

\begin{figure}[h!]\center\leavevmode
\begin{framedverbatim}
~alp/addaccu %-) env | grep MBK
MBK_OUT_PH=ap
MBK_CATAL_NAME=CATAL
MBK_SCALE_X=100
MBK_VSS=vss
MBK_CATA_LIB=.:\$ALLIANCE\_TOP/cells/sxlib:\$ALLIANCE\_TOP/cells/padlib
MBK_WORK_LIB=.
MBK_VDD=vdd
MBK_C4_LIB=./cellsC4
MBK_IN_LO=vst
MBK_IN_PH=ap
MBK_TARGET_LIB=\$ALLIANCE\_TOP/cells/sxlib
MBK_OUT_LO=vst
\end{framedverbatim}
\caption{\label{mbk} \texttt{MBK} environment variables.}
\end{figure}

All these variables are documented at least with a manual page. However, some
variables are documented in each tutorial.

\section{File Formats}
One of the interesting features of \textbf{Alliance} is that different 
file formats can be used for both netlist and layout view.
However, 
in the design methodology we wish to promote, some formats are 
recommended.
The \texttt{vst}, structural \textbf{VHDL}, is dedicated to netlist 
specification.
The \texttt{al} format is dedicated to extracted layout representation.
The \texttt{ap} format is the usual layout format.

So, prior to generate a specification netlist, you shall type:
\begin{phraseverbatim}
~alp/addaccu %-) setenv MBK_OUT_LO vst
\end{phraseverbatim}

Otherwise, if you are running a \texttt{sh-like} shell:
\begin{phraseverbatim}
~alp/addaccu %-) MBK_OUT_LO=vst; export MBK_OUT_LO
\end{phraseverbatim}

But if you wish to extract a netlist from the layout then you'll do:
\begin{phraseverbatim}
~alp/addaccu %-) setenv MBK_OUT_LO al
\end{phraseverbatim}

You are now ready to actually do all tutorials.
\end{document}
