Index of /s/sys/buster-libre-soc/usr/src/gcc-8.3.0/gcc/testsuite/gcc.target/aarch64

[ICO]NameLast modifiedSizeDescription

[PARENTDIR]Parent Directory  -  
[TXT]options_set_10.c2024-09-15 03:45 292  
[TXT]options_set_9.c2024-09-15 03:45 466  
[TXT]options_set_8.c2024-09-15 03:45 276  
[TXT]options_set_7.c2024-09-15 03:45 255  
[TXT]options_set_6.c2024-09-15 03:45 337  
[TXT]options_set_5.c2024-09-15 03:45 293  
[TXT]options_set_4.c2024-09-15 03:45 297  
[TXT]options_set_3.c2024-09-15 03:45 261  
[TXT]options_set_2.c2024-09-15 03:45 267  
[TXT]options_set_1.c2024-09-15 03:45 227  
[DIR]sve/2019-02-22 07:21 -  
[DIR]simd/2019-02-22 07:21 -  
[DIR]fp16/2019-02-22 07:21 -  
[DIR]advsimd-intrinsics/2019-02-22 07:21 -  
[DIR]acle/2019-02-22 07:21 -  
[DIR]aapcs64/2019-02-22 07:21 -  
[TXT]pr62178.c2019-01-10 11:40 599  
[TXT]asm-5.c2019-01-08 03:11 100  
[TXT]pr81414.c2018-04-17 10:34 204  
[TXT]store_v2vec_lanes.c2018-03-27 10:52 841  
[TXT]pr81647.c2018-03-20 02:11 1.3K 
[TXT]movi_hf.c2018-03-12 13:49 161  
[TXT]f16_mov_immediate_2.c2018-03-12 13:49 1.0K 
[TXT]f16_mov_immediate_1.c2018-03-12 13:49 808  
[TXT]test_frame_15.c2018-02-26 02:25 515  
[TXT]test_frame_14.c2018-02-26 02:25 259  
[TXT]test_frame_13.c2018-02-26 02:25 455  
[TXT]test_frame_12.c2018-02-26 02:25 466  
[TXT]test_frame_11.c2018-02-26 02:25 408  
[TXT]test_frame_9.c2018-02-26 02:25 496  
[TXT]test_frame_5.c2018-02-26 02:25 322  
[TXT]test_frame_3.c2018-02-26 02:25 361  
[TXT]spill_1.c2018-02-26 02:25 408  
[TXT]lr_free_2.c2018-02-26 02:25 898  
[TXT]asm-4.c2018-02-22 10:08 141  
[TXT]asm-2.c2018-02-22 10:08 176  
[TXT]pr84252.c2018-02-08 22:48 135  
[TXT]pr83370.c2018-02-01 06:02 298  
[TXT]vect-abs-compile.c2018-01-31 03:06 432  
[TXT]pr79041-2.c2018-01-17 09:31 416  
[TXT]pr78733.c2018-01-17 09:31 416  
[TXT]vector_initialization_nostack.c2018-01-13 10:55 892  
[TXT]vect_smlal_1.c2018-01-13 10:55 8.4K 
[TXT]vect_saddl_1.c2018-01-13 10:55 9.5K 
[TXT]vect-vaddv.c2018-01-13 10:55 4.0K 
[TXT]vect-reduc-or_1.c2018-01-13 10:55 773  
[TXT]vect-mull-compile.c2018-01-13 10:55 924  
[TXT]vect-movi.c2018-01-13 10:55 1.5K 
[TXT]vect-ld1r-compile.c2018-01-13 10:55 631  
[TXT]vect-ld1r-compile-fp.c2018-01-13 10:55 297  
[TXT]vect-fp-compile.c2018-01-13 10:55 446  
[TXT]vect-fmovf.c2018-01-13 10:55 417  
[TXT]vect-fmovf-zero.c2018-01-13 10:55 411  
[TXT]vect-fmovd.c2018-01-13 10:55 413  
[TXT]vect-fmovd-zero.c2018-01-13 10:55 407  
[TXT]vect-fmaxv-fminv-compile.c2018-01-13 10:55 337  
[TXT]vect-fmax-fmin-compile.c2018-01-13 10:55 224  
[TXT]vect-fcm-gt-f.c2018-01-13 10:55 612  
[TXT]vect-fcm-gt-d.c2018-01-13 10:55 600  
[TXT]vect-fcm-ge-f.c2018-01-13 10:55 612  
[TXT]vect-fcm-ge-d.c2018-01-13 10:55 600  
[TXT]vect-fcm-eq-f.c2018-01-13 10:55 523  
[TXT]vect-fcm-eq-d.c2018-01-13 10:55 521  
[TXT]vect-faddv-compile.c2018-01-13 10:55 175  
[TXT]vect-compile.c2018-01-13 10:55 866  
[TXT]vect-add-sub-cond.c2018-01-13 10:55 3.1K 
[TXT]uaddw-3.c2018-01-13 10:55 371  
[TXT]uaddw-2.c2018-01-13 10:55 380  
[TXT]uaddw-1.c2018-01-13 10:55 379  
[TXT]saddw-2.c2018-01-13 10:55 365  
[TXT]saddw-1.c2018-01-13 10:55 361  
[TXT]pr71727-2.c2018-01-13 10:55 418  
[TXT]orr_imm_1.c2018-01-13 10:55 1.1K 
[TXT]fmul_fcvt_2.c2018-01-13 10:55 1.2K 
[TXT]fmaxmin.c2018-01-13 10:55 1.9K 
[TXT]bic_imm_1.c2018-01-13 10:55 1.1K 
[TXT]pr70044.c2018-01-11 06:13 350  
[TXT]sm3_sm4.c2018-01-10 23:04 2.0K 
[TXT]sha3_3.c2018-01-10 23:04 526  
[TXT]sha3_2.c2018-01-10 23:04 526  
[TXT]sha3_1.c2018-01-10 23:04 527  
[TXT]sha3.h2018-01-10 23:04 414  
[TXT]sha2_3.c2018-01-10 23:04 471  
[TXT]sha2_2.c2018-01-10 23:04 471  
[TXT]sha2_1.c2018-01-10 23:04 471  
[TXT]sha2.h2018-01-10 23:04 463  
[TXT]fp16_fmul_low_3.c2018-01-10 23:04 498  
[TXT]fp16_fmul_low_2.c2018-01-10 23:04 501  
[TXT]fp16_fmul_low_1.c2018-01-10 23:04 501  
[TXT]fp16_fmul_low.h2018-01-10 23:04 498  
[TXT]fp16_fmul_lane_low_3.c2018-01-10 23:04 967  
[TXT]fp16_fmul_lane_low_2.c2018-01-10 23:04 970  
[TXT]fp16_fmul_lane_low_1.c2018-01-10 23:04 970  
[TXT]fp16_fmul_lane_low.h2018-01-10 23:04 1.1K 
[TXT]fp16_fmul_lane_high_3.c2018-01-10 23:04 1.0K 
[TXT]fp16_fmul_lane_high_2.c2018-01-10 23:04 1.0K 
[TXT]fp16_fmul_lane_high_1.c2018-01-10 23:04 1.0K 
[TXT]fp16_fmul_lane_high.h2018-01-10 23:04 1.1K 
[TXT]fp16_fmul_high_3.c2018-01-10 23:04 503  
[TXT]fp16_fmul_high_2.c2018-01-10 23:04 506  
[TXT]fp16_fmul_high_1.c2018-01-10 23:04 506  
[TXT]fp16_fmul_high.h2018-01-10 23:04 506  
[TXT]reg-alloc-1.c2018-01-06 04:07 532  
[TXT]bics_5.c2018-01-05 03:45 1.4K 
[   ]aarch64.exp2018-01-03 03:03 1.3K 
[TXT]asm-3.c2017-12-07 11:43 142  
[TXT]fmls.c2017-11-17 15:56 465  
[TXT]pr81356.c2017-11-17 15:46 150  
[TXT]copysign-bsl.c2017-11-14 07:09 265  
[TXT]bsl-idiom.c2017-11-14 07:09 2.3K 
[TXT]load_v2vec_lanes_1.c2017-11-08 11:27 600  
[TXT]construct_lane_zero_1.c2017-11-08 11:23 733  
[TXT]dwarf-cfa-reg.c2017-11-08 08:34 419  
[TXT]target_attr_17.c2017-11-02 15:58 188  
[TXT]target_attr_12.c2017-11-02 15:58 304  
[TXT]target_attr_11.c2017-11-02 15:58 302  
[TXT]spellcheck_3.c2017-11-02 15:58 453  
[TXT]spellcheck_2.c2017-11-02 15:58 450  
[TXT]spellcheck_1.c2017-11-02 15:58 441  
[TXT]vect-vcvt.c2017-10-27 00:05 5.7K 
[TXT]fix_trunc1.c2017-10-27 00:05 450  
[TXT]ldp_stp_unaligned_2.c2017-10-26 10:34 304  
[TXT]inline-lrint_2.c2017-10-26 00:42 564  
[TXT]pr80295.c2017-10-17 08:16 120  
[TXT]cmpelim_mult_uses_1.c2017-10-14 17:07 422  
[TXT]var_shift_mask_2.c2017-10-07 21:57 1.0K 
[TXT]vect_copy_lane_1.c2017-10-02 02:11 4.1K 
[TXT]vmov_n_1.c2017-09-13 05:40 10K 
[TXT]pr63304_1.c2017-09-12 19:28 632  
[TXT]long_branch_1.c2017-08-14 10:18 2.2K 
[TXT]dbl_mov_immediate_1.c2017-08-14 04:28 1.2K 
[TXT]vect-xorsign_exec.c2017-08-09 18:05 1.5K 
[TXT]xorsign_exec.c2017-08-08 07:17 444  
[TXT]xorsign.c2017-08-08 07:17 1.5K 
[TXT]target_attr_crypto_ice_2.c2017-08-06 13:04 524  
[TXT]target_attr_crypto_ice_1.c2017-08-06 13:04 527  
[TXT]target_attr_15.c2017-08-06 13:04 306  
[TXT]target_attr_13.c2017-08-06 13:04 440  
[TXT]target_attr_10.c2017-08-06 13:04 466  
[TXT]target_attr_7.c2017-08-06 13:04 536  
[TXT]target_attr_4.c2017-08-06 13:04 651  
[TXT]target_attr_3.c2017-08-06 13:04 955  
[TXT]target_attr_2.c2017-08-06 13:04 749  
[TXT]target_attr_1.c2017-08-06 13:04 367  
[TXT]atomic_cmp_exchange_zero_strong_1.c2017-08-06 12:10 326  
[TXT]atomic_cmp_exchange_zero_reg_1.c2017-08-06 12:10 379  
[TXT]_Float16_3.c2017-08-06 11:47 1.2K 
[TXT]_Float16_2.c2017-08-06 11:47 1.3K 
[TXT]_Float16_1.c2017-08-06 11:47 1.2K 
[TXT]int_mov_immediate_1.c2017-07-28 10:47 1.4K 
[TXT]flt_mov_immediate_1.c2017-07-28 09:14 1.0K 
[TXT]tst_imm_split_1.c2017-07-27 10:29 425  
[TXT]cmp-2.c2017-07-11 20:18 306  
[TXT]var_shift_mask_1.c2017-07-10 18:17 1.5K 
[TXT]stack-checking.c2017-07-06 02:12 317  
[TXT]ccmp_2.c2017-06-29 12:23 188  
[TXT]pr79794.c2017-06-23 15:01 418  
[TXT]vect-init-5.c2017-06-14 04:20 287  
[TXT]vect-init-4.c2017-06-14 04:20 287  
[TXT]vect-init-3.c2017-06-14 04:20 287  
[TXT]vect-init-2.c2017-06-14 04:20 296  
[TXT]vect-init-1.c2017-06-14 04:20 305  
[TXT]no-inline-lrint_2.c2017-06-12 08:23 559  
[TXT]no-inline-lrint_1.c2017-06-12 08:23 558  
[TXT]inline-lrint_1.c2017-06-12 08:23 538  
[TXT]lrint-matherr.h2017-06-09 07:33 214  
[TXT]sdiv_costs_1.c2017-06-07 04:06 689  
[TXT]store_lane0_str_1.c2017-06-05 02:52 1.6K 
[TXT]subs_compare_2.c2017-06-05 02:49 296  
[TXT]subs_compare_1.c2017-06-05 02:46 304  
[TXT]cmp_shifted_reg_1.c2017-06-02 09:32 235  
[TXT]hfmode_ins_1.c2017-06-02 09:03 472  
[TXT]prfm_imm_offset_1.c2017-05-04 10:14 380  
[TXT]mgeneral-regs_1.c2017-04-19 00:55 395  
[TXT]vect_fp16_1.c2017-02-14 07:48 1.0K 
[TXT]popcnt.c2017-02-07 19:54 340  
[TXT]test_frame_10.c2017-02-07 02:32 591  
[TXT]test_frame_8.c2017-02-07 02:32 483  
[TXT]test_frame_7.c2017-02-07 02:32 502  
[TXT]test_frame_6.c2017-02-07 02:32 552  
[TXT]test_frame_4.c2017-02-07 02:32 541  
[TXT]test_frame_2.c2017-02-07 02:32 540  
[TXT]test_frame_1.c2017-02-07 02:32 523  
[TXT]ldp_vec_64_1.c2017-01-26 08:04 448  
[TXT]return_address_sign_3.c2017-01-20 14:03 645  
[TXT]return_address_sign_2.c2017-01-20 14:03 476  
[TXT]return_address_sign_1.c2017-01-20 14:03 1.1K 
[TXT]eh_return.c2017-01-17 12:34 1.0K 
[TXT]pr71016.c2017-01-05 14:14 207  
[TXT]ubfiz_lsl_1.c2016-12-16 09:26 286  
[TXT]ubfx_lsr_1.c2016-12-16 09:24 293  
[TXT]pr78255.c2016-12-09 09:46 189  
[TXT]pr78382.c2016-12-07 22:09 148  
[TXT]pr71727.c2016-12-06 20:10 537  
[TXT]pr78561.c2016-12-05 02:35 136  
[TXT]floatdihf2_1.c2016-11-24 11:14 524  
[TXT]store-pair-1.c2016-11-24 03:24 281  
[TXT]ldp_stp_1.c2016-11-24 03:24 398  
[TXT]vect_ctz_1.c2016-11-24 02:42 834  
[TXT]vect-clz.c2016-11-24 02:42 549  
[TXT]and_const2.c2016-11-23 00:47 251  
[TXT]and_const.c2016-11-23 00:47 232  
[TXT]store_repeating_constant_2.c2016-11-17 07:25 416  
[TXT]store_repeating_constant_1.c2016-11-17 07:25 272  
[TXT]ldp_stp_4.c2016-10-28 08:18 390  
[TXT]test_frame_common.h2016-10-24 16:31 1.9K 
[TXT]test_frame_17.c2016-10-21 11:27 333  
[TXT]pr78038.c2016-10-21 01:55 431  
[TXT]pr68102_1.c2016-10-17 10:52 306  
[TXT]mult-synth_4.c2016-10-17 10:52 232  
[TXT]fmul_fcvt_1.c2016-10-17 10:52 4.5K 
[TXT]combine_bfi_1.c2016-10-17 10:52 520  
[TXT]cinc_common_1.c2016-10-17 10:52 961  
[TXT]spellcheck_6.c2016-10-14 02:40 336  
[TXT]spellcheck_5.c2016-10-14 02:40 323  
[TXT]spellcheck_4.c2016-10-14 02:40 327  
[TXT]gtu_to_ltu_cmp_2.c2016-09-19 10:15 254  
[TXT]gtu_to_ltu_cmp_1.c2016-09-19 10:15 197  
[TXT]thunderxnoloadpair.c2016-09-12 15:30 314  
[TXT]thunderxloadpair.c2016-09-12 15:30 327  
[TXT]cpu-diagnostics-4.c2016-09-07 14:18 200  
[TXT]cpu-diagnostics-3.c2016-09-07 14:18 218  
[TXT]cpu-diagnostics-2.c2016-09-07 14:18 207  
[TXT]cpu-diagnostics-1.c2016-09-07 14:18 199  
[TXT]arch-diagnostics-2.c2016-09-07 14:18 125  
[TXT]arch-diagnostics-1.c2016-09-07 14:18 124  
[TXT]ands_3.c2016-09-01 03:03 233  
[TXT]vminmaxnm.c2016-08-02 03:25 948  
[TXT]test_frame_16.c2016-08-01 10:37 703  
[TXT]ldp_stp_unaligned_1.c2016-08-01 04:20 504  
[TXT]pr63874.c2016-07-04 03:06 493  
[TXT]vget_set_lane_1.c2016-06-30 09:15 3.7K 
[TXT]ifcvt_multiple_sets_subreg_1.c2016-06-15 04:08 466  
[TXT]pr37780_1.c2016-06-06 10:06 761  
[TXT]va_arg_3.c2016-05-27 07:05 519  
[TXT]va_arg_2.c2016-05-27 07:05 325  
[TXT]va_arg_1.c2016-05-27 07:05 194  
[TXT]tail_indirect_call_1.c2016-05-18 06:33 258  
[TXT]noplt_3.c2016-05-18 06:33 369  
[TXT]fmls_intrinsic_1.c2016-05-17 10:34 3.5K 
[TXT]fmla_intrinsic_1.c2016-05-17 10:34 3.4K 
[TXT]pr70809_1.c2016-05-17 06:15 582  
[TXT]struct_return.c2016-05-13 03:23 460  
[TXT]fmovf-zero-reg.c2016-04-27 13:52 162  
[TXT]fmovd-zero-reg.c2016-04-27 13:52 159  
[TXT]mgeneral-regs_4.c2016-04-11 04:14 170  
[TXT]pr70398.c2016-04-06 10:48 666  
[TXT]pr70120-3.c2016-03-25 17:37 2.0K 
[TXT]pr70120-2.c2016-03-25 17:37 1.0K 
[TXT]pr70120-1.c2016-03-25 17:37 1.2K 
[TXT]pr69245_2.c2016-03-11 08:27 277  
[TXT]shift_wide_invalid_1.c2016-03-04 04:09 817  
[TXT]scalar_shift_1.c2016-03-04 04:09 5.4K 
[TXT]pr69245_1.c2016-02-26 09:02 295  
[TXT]assembler_arch_1.c2016-02-19 07:20 467  
[TXT]vrnd_f64_1.c2016-02-11 16:53 3.3K 
[TXT]pr60697.c2016-02-11 16:53 18K 
[TXT]ccmp_1.c2016-02-03 05:18 1.4K 
[TXT]tst_3.c2016-01-28 10:48 180  
[TXT]pr68674.c2016-01-22 07:16 321  
[TXT]tst_6.c2016-01-11 07:44 183  
[TXT]tst_5.c2016-01-11 07:44 326  
[TXT]pr68651_1.c2016-01-05 09:06 325  
[TXT]tst_4.c2015-12-18 02:58 177  
[TXT]got_mem_hoist_1.c2015-12-08 08:37 526  
[TXT]cmpimm_cset_1.c2015-11-24 06:08 623  
[TXT]cmpimm_branch_1.c2015-11-24 06:08 648  
[TXT]pr68363_1.c2015-11-23 07:56 236  
[TXT]vclz.c2015-11-16 05:41 15K 
[TXT]umaddl_combine_1.c2015-11-13 08:12 552  
[TXT]cond_op_imm_1.c2015-11-10 02:37 1.3K 
[TXT]pr68106.c2015-10-30 11:45 1.1K 
[TXT]stp_vec_64_1.c2015-10-20 11:18 341  
[TXT]vdiv_f.c2015-10-20 08:46 8.4K 
[TXT]pr66912.c2015-10-20 03:37 751  
[TXT]table-intrinsics.c2015-10-13 07:15 7.3K 
[TXT]get_lane_f16_1.c2015-10-06 15:08 536  
[TXT]tlsle_sizeadj_tiny_1.c2015-10-02 08:47 422  
[TXT]tlsle_sizeadj_small_1.c2015-10-02 08:47 458  
[TXT]tlsle24_tiny_1.c2015-10-02 08:47 422  
[TXT]tlsle12_tiny_1.c2015-10-02 08:47 358  
[TXT]csneg-1.c2015-10-02 06:52 1.3K 
[TXT]pr66776.c2015-10-02 05:55 211  
[TXT]vect_combine_zeroes_1.c2015-10-02 02:32 453  
[TXT]fpcr_fpsr_1.c2015-09-25 05:54 285  
[TXT]atomic-inst-ldlogic.c2015-09-22 03:41 4.7K 
[TXT]atomic-inst-ldadd.c2015-09-22 03:41 2.5K 
[TXT]atomic-inst-swp.c2015-09-22 03:19 1.4K 
[   ]atomic-inst-ops.inc2015-09-22 03:19 2.6K 
[TXT]copysign_2.c2015-09-17 02:23 1.2K 
[TXT]copysign_1.c2015-09-17 02:23 1.2K 
[TXT]vect_int32x2x4_1.c2015-09-15 07:16 633  
[TXT]pic-small.c2015-09-10 03:15 604  
[   ]mod_256.x2015-09-09 02:41 36  
[TXT]mod_256.c2015-09-09 02:41 165  
[   ]mod_2.x2015-09-09 02:41 34  
[TXT]mod_2.c2015-09-09 02:41 231  
[TXT]vget_low_1.c2015-09-08 13:13 2.2K 
[TXT]vget_high_1.c2015-09-08 13:13 2.2K 
[TXT]vldN_lane_1.c2015-09-08 13:03 3.6K 
[TXT]vldN_dup_1.c2015-09-08 13:03 2.8K 
[TXT]vldN_1.c2015-09-08 13:03 2.1K 
[TXT]vset_lane_1.c2015-09-08 12:57 3.3K 
[TXT]vld1_lane.c2015-09-08 12:57 2.5K 
[TXT]vld1-vst1_1.c2015-09-08 12:57 1.6K 
[TXT]arm_align_max_stack_pwr.c2015-09-03 11:16 352  
[TXT]arm_align_max_pwr.c2015-09-03 11:16 460  
[TXT]tlsie_tiny_1.c2015-08-26 07:38 225  
[TXT]tlsle32_1.c2015-08-26 07:16 391  
[TXT]tlsle24_1.c2015-08-26 07:16 341  
[TXT]tlsle12_1.c2015-08-26 07:16 277  
[   ]tls_1.x2015-08-26 07:16 151  
[TXT]ashltidisi.c2015-08-19 16:55 1.2K 
[TXT]fcvt_uint_float_double4.c2015-08-18 13:04 255  
[TXT]fcvt_uint_float_double3.c2015-08-18 13:04 190  
[TXT]fcvt_uint_float_double2.c2015-08-18 13:04 257  
[TXT]fcvt_uint_float_double1.c2015-08-18 13:04 191  
[TXT]fcvt_int_float_double4.c2015-08-18 13:04 259  
[TXT]fcvt_int_float_double3.c2015-08-18 13:04 195  
[TXT]fcvt_int_float_double2.c2015-08-18 13:04 252  
[TXT]fcvt_int_float_double1.c2015-08-18 13:04 187  
[TXT]sync-op-release.c2015-08-18 10:10 156  
[TXT]sync-op-full.c2015-08-18 10:10 338  
[TXT]sync-op-acquire.c2015-08-18 10:10 337  
[TXT]sync-comp-swap.c2015-08-18 10:10 350  
[TXT]atomic-op-short.c2015-08-18 10:10 282  
[TXT]atomic-op-seq_cst.c2015-08-18 10:10 284  
[TXT]atomic-op-release.c2015-08-18 10:10 283  
[TXT]atomic-op-relaxed.c2015-08-18 10:10 282  
[TXT]atomic-op-long.c2015-08-18 10:10 1.1K 
[TXT]atomic-op-int.c2015-08-18 10:10 278  
[TXT]atomic-op-imm.c2015-08-18 10:10 1.5K 
[TXT]atomic-op-consume.c2015-08-18 10:10 338  
[TXT]atomic-op-char.c2015-08-18 10:10 281  
[TXT]atomic-op-acquire.c2015-08-18 10:10 283  
[TXT]atomic-op-acq_rel.c2015-08-18 10:10 284  
[TXT]atomic-comp-swap-release-acquire.c2015-08-18 10:10 312  
[TXT]target_attr_14.c2015-08-14 03:54 332  
[TXT]target_attr_8.c2015-08-14 03:54 393  
[TXT]target_attr_5.c2015-08-14 03:54 349  
[TXT]atomic-inst-cas.c2015-08-13 05:30 2.2K 
[TXT]noplt_2.c2015-08-07 07:26 418  
[TXT]noplt_1.c2015-08-07 07:26 339  
[TXT]target_attr_9.c2015-08-04 04:41 385  
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[TXT]pragma_cpp_predefs_1.c2015-08-04 04:41 5.2K 
[TXT]csel_imms_inc_1.c2015-08-03 02:14 509  
[TXT]csel_bfx_1.c2015-08-03 02:14 253  
[TXT]f16_movs_1.c2015-07-29 06:27 399  
[TXT]neg_abs_1.c2015-07-20 06:51 292  
[TXT]subs3.c2015-07-13 04:19 1.1K 
[TXT]subs1.c2015-07-13 04:19 2.6K 
[TXT]bics_1.c2015-07-13 04:19 1.9K 
[TXT]ands_1.c2015-07-13 04:19 2.7K 
[TXT]adds3.c2015-07-13 04:19 1.1K 
[TXT]adds1.c2015-07-13 04:19 2.6K 
[TXT]fnmul-4.c2015-07-09 08:37 344  
[TXT]fnmul-3.c2015-07-09 08:37 328  
[TXT]fnmul-2.c2015-07-09 08:37 478  
[TXT]fnmul-1.c2015-07-09 08:37 324  
[TXT]mgeneral-regs_3.c2015-06-24 10:26 244  
[TXT]nofp_1.c2015-06-24 10:13 609  
[TXT]mgeneral-regs_2.c2015-06-24 10:13 363  
[TXT]fmovld-zero-reg.c2015-06-19 11:22 168  
[TXT]fmovld-zero-mem.c2015-06-19 11:22 172  
[TXT]fmovf-zero-mem.c2015-06-19 11:22 161  
[TXT]fmovd-zero-mem.c2015-06-19 11:22 162  
[TXT]pr62308.c2015-06-19 07:02 184  
[   ]sync-op-release.x2015-06-01 09:24 70  
[   ]sync-op-full.x2015-06-01 09:24 911  
[   ]sync-op-acquire.x2015-06-01 09:24 90  
[   ]sync-comp-swap.x2015-06-01 09:24 207  
[TXT]vdup_lane_2.c2015-05-29 07:21 6.9K 
[TXT]vsub_f64.c2015-05-29 02:20 1.6K 
[TXT]vrecpx.c2015-05-29 02:20 1.0K 
[TXT]vrecps.c2015-05-29 02:20 3.8K 
[TXT]vqneg_s64_1.c2015-05-29 02:20 1.1K 
[TXT]vqabs_s64_1.c2015-05-29 02:20 1.4K 
[TXT]vneg_s.c2015-05-29 02:20 7.4K 
[TXT]vneg_f.c2015-05-29 02:20 6.4K 
[TXT]vect-vrnd.c2015-05-29 02:20 3.9K 
[TXT]vect-vmaxv.c2015-05-29 02:20 4.4K 
[TXT]vect-vfmaxv.c2015-05-29 02:20 5.1K 
[TXT]vect-vca.c2015-05-29 02:20 2.8K 
[TXT]vec_init_1.c2015-05-29 02:20 881  
[TXT]vdup_n_2.c2015-05-29 02:20 685  
[TXT]vdup_n_1.c2015-05-29 02:20 10K 
[TXT]vdup_lane_1.c2015-05-29 02:20 7.9K 
[TXT]vbslq_u64_2.c2015-05-29 02:20 494  
[TXT]vbslq_u64_1.c2015-05-29 02:20 352  
[TXT]vbslq_f64_2.c2015-05-29 02:20 560  
[TXT]vbslq_f64_1.c2015-05-29 02:20 433  
[TXT]vadd_f64.c2015-05-29 02:20 1.5K 
[TXT]vabs_intrinsic_1.c2015-05-29 02:20 2.9K 
[TXT]ushr64_1.c2015-05-29 02:20 2.1K 
[TXT]tst_2.c2015-05-29 02:20 3.1K 
[TXT]tst_1.c2015-05-29 02:20 2.5K 
[TXT]test_fp_attribute_2.c2015-05-29 02:20 402  
[TXT]test_fp_attribute_1.c2015-05-29 02:20 394  
[TXT]test-framepointer-8.c2015-05-29 02:20 553  
[TXT]test-framepointer-7.c2015-05-29 02:20 495  
[TXT]test-framepointer-6.c2015-05-29 02:20 499  
[TXT]test-framepointer-5.c2015-05-29 02:20 448  
[TXT]test-framepointer-4.c2015-05-29 02:20 539  
[TXT]test-framepointer-3.c2015-05-29 02:20 502  
[TXT]test-framepointer-2.c2015-05-29 02:20 506  
[TXT]test-framepointer-1.c2015-05-29 02:20 455  
[TXT]symbol-range.c2015-05-29 02:20 240  
[TXT]symbol-range-tiny.c2015-05-29 02:20 230  
[TXT]subs2.c2015-05-29 02:20 3.0K 
[TXT]sshr64_1.c2015-05-29 02:20 2.1K 
[TXT]singleton_intrinsics_1.c2015-05-29 02:20 7.4K 
[TXT]shrink_wrap_symbol_ref_1.c2015-05-29 02:20 583  
[TXT]sha256_1.c2015-05-29 02:20 891  
[TXT]sha1_1.c2015-05-29 02:20 1.1K 
[TXT]scalar-vca.c2015-05-29 02:20 2.1K 
[TXT]sbc.c2015-05-29 02:20 779  
[TXT]ror.c2015-05-29 02:20 596  
[TXT]pr64304.c2015-05-29 02:20 351  
[TXT]pr60580_1.c2015-05-29 02:20 655  
[TXT]pmull_1.c2015-05-29 02:20 391  
[TXT]ngc.c2015-05-29 02:20 1.1K 
[TXT]neg_1.c2015-05-29 02:20 1.1K 
[TXT]mult-synth_6.c2015-05-29 02:20 168  
[TXT]mult-synth_5.c2015-05-29 02:20 168  
[TXT]mult-synth_3.c2015-05-29 02:20 204  
[TXT]mult-synth_2.c2015-05-29 02:20 204  
[TXT]mult-synth_1.c2015-05-29 02:20 205  
[TXT]mul_intrinsic_1.c2015-05-29 02:20 2.2K 
[TXT]movk.c2015-05-29 02:20 704  
[TXT]mls_intrinsic_1.c2015-05-29 02:20 2.4K 
[TXT]mla_intrinsic_1.c2015-05-29 02:20 2.3K 
[TXT]lr_free_1.c2015-05-29 02:20 1.1K 
[TXT]legitimize_stack_var_before_reload_1.c2015-05-29 02:20 348  
[TXT]insv_2.c2015-05-29 02:20 1.4K 
[TXT]insv_1.c2015-05-29 02:20 1.4K 
[TXT]fmul_intrinsic_1.c2015-05-29 02:20 3.5K 
[TXT]fabd.c2015-05-29 02:20 623  
[TXT]extr.c2015-05-29 02:20 676  
[TXT]cvtf_1.c2015-05-29 02:20 3.0K 
[TXT]cmn-neg2.c2015-05-29 02:20 495  
[TXT]cmn-neg.c2015-05-29 02:20 484  
[TXT]bics_4.c2015-05-29 02:20 1.4K 
[TXT]bics_3.c2015-05-29 02:20 1.2K 
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[TXT]bfxil_2.c2015-05-29 02:20 721  
[TXT]bfxil_1.c2015-05-29 02:20 668  
[TXT]ands_2.c2015-05-29 02:20 3.4K 
[TXT]aes_1.c2015-05-29 02:20 798  
[TXT]adds2.c2015-05-29 02:20 3.0K 
[TXT]abs_2.c2015-05-29 02:20 679  
[TXT]abs_1.c2015-05-29 02:20 865  
[TXT]pr65491_1.c2015-05-22 08:36 166  
[TXT]iinline-attr-1.c2015-05-06 04:54 493  
[TXT]vstN_lane_1.c2015-04-29 10:10 2.4K 
[TXT]c-output-template-4.c2015-04-17 10:43 168  
[TXT]unsigned-float.c2015-04-16 02:36 231  
[TXT]c-output-template-3.c2015-04-07 11:28 167  
[TXT]pr65624.c2015-04-01 05:18 323  
[TXT]pr65235_1.c2015-03-12 07:40 796  
[TXT]sisd-shft-neg_1.c2015-02-20 07:05 584  
[TXT]pr64263_1.c2015-01-16 07:50 475  
[TXT]volatileloadpair-2.c2015-01-15 07:43 742  
[TXT]volatileloadpair-1.c2015-01-15 07:43 619  
[TXT]subsp.c2015-01-13 07:11 317  
[TXT]eon_1.c2014-12-19 10:59 868  
[TXT]ldp_stp_3.c2014-12-11 21:45 322  
[TXT]ldp_stp_2.c2014-12-11 21:45 304  
[TXT]arg-type-diagnostics-1.c2014-12-09 13:08 606  
[TXT]vld1_lane-o0.c2014-12-09 12:37 264  
[TXT]vabs_intrinsic_2.c2014-12-09 12:19 323  
[TXT]narrow_high-intrinsics.c2014-12-08 07:19 5.5K 
[TXT]ldp_stp_5.c2014-12-05 10:06 382  
[TXT]fuse-caller-save.c2014-12-03 03:28 419  
[TXT]fuse_adrp_add_1.c2014-12-01 10:26 1.4K 
[TXT]pr63424.c2014-11-19 09:34 574  
[TXT]madd_after_asm_1.c2014-10-29 15:44 340  
[   ]vect.x2014-10-22 02:51 2.3K 
[   ]vect-ld1r.x2014-10-22 02:51 318  
[TXT]vect-fp.c2014-10-22 02:51 3.8K 
[TXT]vect-fmax-fmin.c2014-10-22 02:51 2.3K 
[TXT]reload-valid-spoff.c2014-10-22 02:51 6.3K 
[TXT]pic-symrefplus.c2014-10-22 02:51 4.3K 
[TXT]pic-constantpool1.c2014-10-22 02:51 1.1K 
[TXT]scalar_intrinsics.c2014-09-30 07:58 24K 
[TXT]vstN_1.c2014-09-10 07:20 2.1K 
[TXT]vqdml_lane_intrinsics-bad_1.c2014-09-09 04:15 1.0K 
[TXT]pr62040.c2014-09-04 10:06 503  
[TXT]pr62262.c2014-08-27 10:48 375  
[TXT]vector_intrinsics.c2014-06-20 02:51 18K 
[TXT]pr61325.c2014-05-29 11:37 337  
[TXT]fcsel_1.c2014-04-28 23:10 319  
[TXT]rev16_1.c2014-04-23 09:26 1.1K 
[TXT]vreinterpret_f64_1.c2014-04-22 10:06 12K 
[TXT]pr60034.c2014-03-30 16:41 258  
[TXT]vect-abs.c2014-03-24 05:47 2.6K 
[TXT]c-output-template-2.c2013-10-24 08:44 132  
[TXT]c-output-template.c2013-10-17 10:49 128  
[TXT]pr58460.c2013-10-03 04:54 333  
[TXT]movdi_1.c2013-09-09 07:53 520  
[TXT]test-ptr-arg-on-stack-1.c2013-07-23 06:29 925  
[TXT]fcvt_float_ulong.c2013-07-23 06:23 1.2K 
[TXT]fcvt_float_uint.c2013-07-23 06:23 812  
[TXT]fcvt_float_long.c2013-07-23 06:23 862  
[TXT]fcvt_float_int.c2013-07-23 06:23 831  
[TXT]fcvt_double_ulong.c2013-07-23 06:23 1.2K 
[TXT]fcvt_double_uint.c2013-07-23 06:23 810  
[TXT]fcvt_double_long.c2013-07-23 06:23 860  
[TXT]fcvt_double_int.c2013-07-23 06:23 829  
[TXT]movi_1.c2013-06-04 10:22 378  
[   ]vect-fcm.x2013-05-14 08:56 2.3K 
[   ]vaddv-intrinsic.x2013-04-25 06:44 382  
[TXT]vaddv-intrinsic.c2013-04-25 06:44 488  
[TXT]vaddv-intrinsic-compile.c2013-04-25 06:44 289  
[TXT]cmp.c2013-04-25 06:21 874  
[TXT]scalar-mov.c2013-04-23 07:42 145  
[TXT]negs.c2013-04-11 22:19 1.7K 
[TXT]asm-adder-no-clobber-lr.c2013-04-04 06:28 334  
[TXT]asm-adder-clobber-lr.c2013-04-04 06:28 339  
[   ]atomic-op-short.x2013-03-25 08:55 619  
[   ]atomic-op-seq_cst.x2013-03-25 08:55 593  
[   ]atomic-op-release.x2013-03-25 08:55 593  
[   ]atomic-op-relaxed.x2013-03-25 08:55 593  
[   ]atomic-op-int.x2013-03-25 08:55 593  
[   ]atomic-op-consume.x2013-03-25 08:55 593  
[   ]atomic-op-char.x2013-03-25 08:55 606  
[   ]atomic-op-acquire.x2013-03-25 08:55 593  
[   ]atomic-op-acq_rel.x2013-03-25 08:55 593  
[   ]atomic-comp-swap-release-acquire.x2013-03-25 08:55 770  
[TXT]vect.c2013-03-21 01:47 2.7K 
[   ]vect-fp.x2013-03-21 01:47 1.2K 
[TXT]vect-ld1r.c2013-01-14 10:48 1.0K 
[TXT]vect-ld1r-fp.c2013-01-14 10:48 847  
[TXT]vsqrt.c2013-01-08 07:49 1.1K 
[TXT]fmovf.c2013-01-07 08:22 165  
[TXT]fmovd.c2013-01-07 08:22 166  
[TXT]cmp-1.c2013-01-04 15:30 240  
[TXT]121127.c2012-12-04 07:52 122  
[TXT]builtin-bswap-2.c2012-11-22 08:50 292  
[TXT]builtin-bswap-1.c2012-11-22 08:50 274  
[TXT]csinc-2.c2012-11-16 10:36 311  
[TXT]subs.c2012-11-12 12:35 399  
[TXT]cmn.c2012-11-12 12:35 342  
[TXT]adds.c2012-11-12 12:35 399  
[TXT]volatile-bitfields-3.c2012-10-23 11:13 321  
[TXT]volatile-bitfields-2.c2012-10-23 11:13 321  
[TXT]volatile-bitfields-1.c2012-10-23 11:13 263  
[TXT]vmlsq_laneq.c2012-10-23 11:13 4.0K 
[TXT]vfp-1.c2012-10-23 11:13 2.7K 
[   ]vect-mull.x2012-10-23 11:13 1.3K 
[TXT]vect-mull.c2012-10-23 11:13 4.3K 
[   ]vect-fmaxv-fminv.x2012-10-23 11:13 566  
[   ]vect-fmax-fmin.x2012-10-23 11:13 537  
[   ]vect-faddv.x2012-10-23 11:13 289  
[TXT]vect-faddv.c2012-10-23 11:13 492  
[   ]vect-abs.x2012-10-23 11:13 726  
[TXT]tst-1.c2012-10-23 11:13 1.3K 
[TXT]predefine_tiny.c2012-10-23 11:13 152  
[TXT]predefine_small.c2012-10-23 11:13 152  
[TXT]predefine_large.c2012-10-23 11:13 152  
[TXT]mnegl-2.c2012-10-23 11:13 415  
[TXT]mnegl-1.c2012-10-23 11:13 415  
[TXT]mneg-3.c2012-10-23 11:13 188  
[TXT]mneg-2.c2012-10-23 11:13 187  
[TXT]mneg-1.c2012-10-23 11:13 187  
[TXT]index.c2012-10-23 11:13 1.6K 
[TXT]frint_float.c2012-10-23 11:13 504  
[TXT]frint_double.c2012-10-23 11:13 502  
[   ]frint.x2012-10-23 11:13 870  
[TXT]fnmadd-fastmath.c2012-10-23 11:13 436  
[TXT]fmadd.c2012-10-23 11:13 1.2K 
[TXT]ffs.c2012-10-23 11:13 313  
[   ]fcvt.x2012-10-23 11:13 698  
[TXT]extend.c2012-10-23 11:13 3.5K 
[TXT]ctz.c2012-10-23 11:13 220  
[TXT]csinv-1.c2012-10-23 11:13 1.1K 
[TXT]csinc-1.c2012-10-23 11:13 1.6K 
[TXT]clz.c2012-10-23 11:13 171  
[TXT]clrsb.c2012-10-23 11:13 173  
[TXT]asm-1.c2012-10-23 11:13 225  
[TXT]adc-2.c2012-10-23 11:13 3.5K 
[TXT]adc-1.c2012-10-23 11:13 429  

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